As shown in FIG. 1, a computer system 10 includes at least a processor 12 and a main memory 14. The processor 12 has a central processing unit (CPU) 13 that is used to perform most, if not all, of the data processing and computing operations of the computer system 10. Data needed by or generated from the processor 12 may be stored in the main memory 14. However, because the speed of the processor 12 is typically significantly faster than that of the main memory 14, memory of smaller size and faster speed (referred to and known as “cache” memory) is often implemented to allow the processor 12 to access frequently and/or recently requested data faster than it would otherwise take to obtain such data from the main memory 14.
Still referring to FIG. 1, the processor 12 may also have an “on-chip” (i.e., on the same semiconductor die as the processor 12) cache memory 16 and an “off-chip” (i.e., not on the same semiconductor die as the processor 12) cache memory 18. When the processor 12 requests data, a cache controller (not shown) causes the “on-chip” cache memory 16 to be searched for the requested data. If the search in the “on-chip” cache memory 16 does not result in a “hit” (i.e., a cache “miss” occurs), the “off-chip” cache memory 18 is searched for the requested data. If the requested data is not found in the “off-chip” cache memory 18, the requested data is retrieved from the relatively slow main memory 14. In the case where data is retrieved from the main memory 14, either or both of the “on-chip” cache memory 16 and the “off-chip” cache memory 18 may be updated with that retrieved data.
Those skilled in the art will recognize that a processor may have any number of cache memory levels, which are typically referred to by number in order of decreasing proximity to the processor. Further, those skilled in the art will recognize that any number of cache memories may be “on-chip” and any number of cache memories may be “off-chip.”